Design of Micropower Microphone and Speech Detection Circuits

This thesis describes the design of a low-power speech detector chip. It will be used between an electret microphone and a microcontroller and will generate a digital wake-up signal for the microcontroller when the audio signal is sufficiently “speechlike” to initiate higher-level processing of the amplified audio signal. The rest of the time, the microcontroller will sleep and consume nearly negligible power. The system is implemented using mostly low-power analog continuous-time subthreshold circuits. The speech detection method is based on a model simplified from Büchler. It detects speech by measuring the total modulation spectrum power in the 2–16 Hz phoneme modulation band. It uses Baker and Sarpeshkar’s low-power high-PSRR microphone preamplifier to amplify the microphone signal in the 100 Hz to 2 kHz speech band. The squaring nonlinearity in Delbruck’s antibump circuit extracts the power in the speech band by comparing the amplified microphone signal with its average value. This current-domain power signal is filtered for the phoneme modulation power in the 2–16 Hz band by Mulder et al.’s first-order log-domain band-pass filter. Zhak and Sarpheshkar’s class-B current mirror performs half-wave rectification of this modulation signal. Finally, Indiveri’s low-power silicon neuron generates a spike train whose spiking frequency is proportional to the power in the phoneme band. The design includes Delbruck’s on-chip bias generator for selfbiased operation. The design was targeted at the 1.6 μm MOSIS TinyChip process but with a reduced power supply of 3.3 V. It uses 2 mm2 of area. The average simulated power consumption at chip-level is 215 μW at a 3.3 V power supply including the microphone front-end and the bias generator, and 93 % of this power is the microphone preamplifier. The power consumption reaches a maximum of 475 μW when the silicon neuron spikes. In addition, a microphone preamplifier with controllable feedback resistance for variable gain was designed for fabrication in the MOSIS 0.35 μm CMOS process for a future binaural silicon cochlea. Details of a standard electret microphone are shown. A detailed small signal analysis of Baker and Sarpeshkar’s microphone preamplifier shows how the high-frequency rolloff is critically affected by the parasitic gate-to-drain capacitance of the adaptation feedback transistor.